Intel(R) Threading Building Blocks Doxygen Documentation version 4.2.3
sunos_sparc.h
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1/*
2 Copyright (c) 2005-2020 Intel Corporation
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17
18#if !defined(__TBB_machine_H) || defined(__TBB_machine_sunos_sparc_H)
19#error Do not #include this internal file directly; use public TBB headers instead.
20#endif
21
22#define __TBB_machine_sunos_sparc_H
23
24#include <stdint.h>
25#include <unistd.h>
26
27#define __TBB_WORDSIZE 8
28// Big endian is assumed for SPARC.
29// While hardware may support page-specific bi-endianness, only big endian pages may be exposed to TBB
30#define __TBB_ENDIANNESS __TBB_ENDIAN_BIG
31
34#define __TBB_compiler_fence() __asm__ __volatile__ ("": : :"memory")
35#define __TBB_control_consistency_helper() __TBB_compiler_fence()
36#define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
37#define __TBB_release_consistency_helper() __TBB_compiler_fence()
38#define __TBB_full_memory_fence() __asm__ __volatile__("membar #LoadLoad|#LoadStore|#StoreStore|#StoreLoad": : : "memory")
39
40//--------------------------------------------------
41// Compare and swap
42//--------------------------------------------------
43
51static inline int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, int32_t comparand ){
52 int32_t result;
53 __asm__ __volatile__(
54 "cas\t[%5],%4,%1"
55 : "=m"(*(int32_t *)ptr), "=r"(result)
56 : "m"(*(int32_t *)ptr), "1"(value), "r"(comparand), "r"(ptr)
57 : "memory");
58 return result;
59}
60
68static inline int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, int64_t comparand ){
69 int64_t result;
70 __asm__ __volatile__(
71 "casx\t[%5],%4,%1"
72 : "=m"(*(int64_t *)ptr), "=r"(result)
73 : "m"(*(int64_t *)ptr), "1"(value), "r"(comparand), "r"(ptr)
74 : "memory");
75 return result;
76}
77
78//---------------------------------------------------
79// Fetch and add
80//---------------------------------------------------
81
88static inline int32_t __TBB_machine_fetchadd4(volatile void *ptr, int32_t addend){
89 int32_t result;
90 __asm__ __volatile__ (
91 "0:\t add\t %3, %4, %0\n" // do addition
92 "\t cas\t [%2], %3, %0\n" // cas to store result in memory
93 "\t cmp\t %3, %0\n" // check if value from memory is original
94 "\t bne,a,pn\t %%icc, 0b\n" // if not try again
95 "\t mov %0, %3\n" // use branch delay slot to move new value in memory to be added
96 : "=&r"(result), "=m"(*(int32_t *)ptr)
97 : "r"(ptr), "r"(*(int32_t *)ptr), "r"(addend), "m"(*(int32_t *)ptr)
98 : "ccr", "memory");
99 return result;
100}
101
108static inline int64_t __TBB_machine_fetchadd8(volatile void *ptr, int64_t addend){
109 int64_t result;
110 __asm__ __volatile__ (
111 "0:\t add\t %3, %4, %0\n" // do addition
112 "\t casx\t [%2], %3, %0\n" // cas to store result in memory
113 "\t cmp\t %3, %0\n" // check if value from memory is original
114 "\t bne,a,pn\t %%xcc, 0b\n" // if not try again
115 "\t mov %0, %3\n" // use branch delay slot to move new value in memory to be added
116 : "=&r"(result), "=m"(*(int64_t *)ptr)
117 : "r"(ptr), "r"(*(int64_t *)ptr), "r"(addend), "m"(*(int64_t *)ptr)
118 : "ccr", "memory");
119 return result;
120}
121
122//--------------------------------------------------------
123// Logarithm (base two, integer)
124//--------------------------------------------------------
125
126static inline int64_t __TBB_machine_lg( uint64_t x ) {
127 __TBB_ASSERT(x, "__TBB_Log2(0) undefined");
128 uint64_t count;
129 // one hot encode
130 x |= (x >> 1);
131 x |= (x >> 2);
132 x |= (x >> 4);
133 x |= (x >> 8);
134 x |= (x >> 16);
135 x |= (x >> 32);
136 // count 1's
137 __asm__ ("popc %1, %0" : "=r"(count) : "r"(x) );
138 return count-1;
139}
140
141//--------------------------------------------------------
142
143static inline void __TBB_machine_or( volatile void *ptr, uint64_t value ) {
144 __asm__ __volatile__ (
145 "0:\t or\t %2, %3, %%g1\n" // do operation
146 "\t casx\t [%1], %2, %%g1\n" // cas to store result in memory
147 "\t cmp\t %2, %%g1\n" // check if value from memory is original
148 "\t bne,a,pn\t %%xcc, 0b\n" // if not try again
149 "\t mov %%g1, %2\n" // use branch delay slot to move new value in memory to be added
150 : "=m"(*(int64_t *)ptr)
151 : "r"(ptr), "r"(*(int64_t *)ptr), "r"(value), "m"(*(int64_t *)ptr)
152 : "ccr", "g1", "memory");
153}
154
155static inline void __TBB_machine_and( volatile void *ptr, uint64_t value ) {
156 __asm__ __volatile__ (
157 "0:\t and\t %2, %3, %%g1\n" // do operation
158 "\t casx\t [%1], %2, %%g1\n" // cas to store result in memory
159 "\t cmp\t %2, %%g1\n" // check if value from memory is original
160 "\t bne,a,pn\t %%xcc, 0b\n" // if not try again
161 "\t mov %%g1, %2\n" // use branch delay slot to move new value in memory to be added
162 : "=m"(*(int64_t *)ptr)
163 : "r"(ptr), "r"(*(int64_t *)ptr), "r"(value), "m"(*(int64_t *)ptr)
164 : "ccr", "g1", "memory");
165}
166
167
168static inline void __TBB_machine_pause( int32_t delay ) {
169 // do nothing, inlined, doesn't matter
170}
171
172// put 0xff in memory location, return memory value,
173// generic trylockbyte puts 0x01, however this is fine
174// because all that matters is that 0 is unlocked
175static inline bool __TBB_machine_trylockbyte(unsigned char &flag){
176 unsigned char result;
177 __asm__ __volatile__ (
178 "ldstub\t [%2], %0\n"
179 : "=r"(result), "=m"(flag)
180 : "r"(&flag), "m"(flag)
181 : "memory");
182 return result == 0;
183}
184
185#define __TBB_USE_GENERIC_PART_WORD_CAS 1
186#define __TBB_USE_GENERIC_PART_WORD_FETCH_ADD 1
187#define __TBB_USE_GENERIC_FETCH_STORE 1
188#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
189#define __TBB_USE_GENERIC_RELAXED_LOAD_STORE 1
190#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
191
192#define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V)
193#define __TBB_AtomicAND(P,V) __TBB_machine_and(P,V)
194
195// Definition of other functions
196#define __TBB_Pause(V) __TBB_machine_pause(V)
197#define __TBB_Log2(V) __TBB_machine_lg(V)
198
199#define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P)
static void __TBB_machine_pause(int32_t delay)
Definition: sunos_sparc.h:168
static int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, int32_t comparand)
Definition: sunos_sparc.h:51
static void __TBB_machine_and(volatile void *ptr, uint64_t value)
Definition: sunos_sparc.h:155
static int32_t __TBB_machine_fetchadd4(volatile void *ptr, int32_t addend)
Definition: sunos_sparc.h:88
static bool __TBB_machine_trylockbyte(unsigned char &flag)
Definition: sunos_sparc.h:175
static int64_t __TBB_machine_fetchadd8(volatile void *ptr, int64_t addend)
Definition: sunos_sparc.h:108
static int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, int64_t comparand)
Definition: sunos_sparc.h:68
static void __TBB_machine_or(volatile void *ptr, uint64_t value)
Definition: sunos_sparc.h:143
static int64_t __TBB_machine_lg(uint64_t x)
Definition: sunos_sparc.h:126
#define __TBB_ASSERT(predicate, comment)
No-op version of __TBB_ASSERT.
Definition: tbb_stddef.h:165
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void ITT_FORMAT p void ITT_FORMAT p void size_t ITT_FORMAT d void ITT_FORMAT p const wchar_t ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s no args void ITT_FORMAT p size_t count
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void ITT_FORMAT p void ITT_FORMAT p void size_t ITT_FORMAT d void ITT_FORMAT p const wchar_t ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s no args void ITT_FORMAT p size_t ITT_FORMAT d no args const wchar_t const wchar_t ITT_FORMAT s __itt_heap_function void size_t int ITT_FORMAT d __itt_heap_function void ITT_FORMAT p __itt_heap_function void void size_t int ITT_FORMAT d no args no args unsigned int ITT_FORMAT u const __itt_domain __itt_id ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain __itt_id ITT_FORMAT p const __itt_domain __itt_id __itt_timestamp __itt_timestamp ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain ITT_FORMAT p const __itt_domain __itt_string_handle unsigned long long value

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